SOLUTION

Front-End Process Back-End Process

?Automatically transfer wafer after final polishing.

Automation technology

After final polishing, wafers are transferred from the polisher with slurry and rise agent attached. In general, a special AGV that transfers wafers in a wet condition is used to transfer wafers automatically. In this way, transfer takes a long time, causing deterioration of the wafer condition.
Shibaura proposed to connect the final polisher with single wafer cleaning equipment. Automatic transfer by using OHT is supported by cleaning and drying of the wafer immediately after polishing, contributing to the productivity improvement. This technology also supports the GEM and GEM300 Standard.

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?Control the wafer in-plane etching shape.

Nitride film wet etching technology

In the nitride film wet etching process, control of the shape of etching may be required to cope with the variability of nitride film thicknesses. However, with the conventional batch type wet etching equipment, there is an issue of difficulty in controlling the uniformity.
Shibaura has developed single wafer high-temperature wet etching equipment by incorporating a wafer proximity heater. Etching shapes can be controlled successfully by setting a wafer proximity heater. This contributes to performance enhancement and yield of semiconductor devices.

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?Minimize the groundwork loss.

Nitride film wet etching technology

The conventional single wafer nitride film wet etching equipment has an issue of groundwork loss as the Si concentration cannot be controlled, disabling control of the selection ratio.
Shibaura has developed a function that controls the Si concentration in phosphoric acid and a phosphoric acid recycling function. This enables control of selection ratio, minimizing the groundwork loss.

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?Apply ashing to wafers with a protective material.

Low-temperature ashing technology

The thinned wafer patterning process requires processing of wafers with protective material or support material attached.
Shibaura has enabled resist ashing under the conditions of a low-pressure and a low-temperature by combining a high-density plasma source and an electrostatic chuck.
By using this feature, Shibaura has recently achieved many performance records of HDIS on thin wafers with a support base or a protective material, contributing to productivity enhancement.

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?Achieve uniform etching.

Photomask etching technology

The semiconductor photomask etching process requires uniform etching of wiring patterns of different widths or different densities.
Shibaura developed and launched an etching chamber of a large flow rate and a large exhaust amount. This chamber supplies an etching gas at a large flow rate and enables etching at a low pressure, improving the etching performance. The chamber structure and the material of the chamber were also reviewed, improving the particle performance and supporting fine wiring patterns.

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?Eliminate pattern damage.

Photomask cleaning technology

Semiconductor photomask is required to be of zero defect as an exposure original plate. Therefore, in the photomask manufacturing processing, cleaning is repeated until all the foreign materials are removed. Wiring patterns are etched by cleaning, which has become an issue. Since patterns are significantly damaged in the strong cleaning process, selectivity is required so that detergency affects foreign materials only.
Shibaura has developed a freeze cleaning technology. By using the volume expansion that occurs at freezing of water and the buoyancy of ice, this technology achieved the selectivity for affecting foreign materials only. Pattern etching will not occur since water is used for cleaning. This technology contributes to the improvement of the yield of photomasks.

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?Clean wafers without deteriorating the surface roughness of the wafers.

Cleaning technology

In the semiconductor wafer manufacturing process, the surface roughness of the wafer after final polishing is said to be in the best condition. In the conventional SC-1 cleaning (APM cleaning), the surface roughness is known to deteriorate since the wafer surface is cleaned by etching.
Shibaura has achieved both the surface roughness and cleaning performance by applying the cleaning process where the amount of etching is controlled by using brushes, ozone water, and dilute hydrofluoric acid.

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?Achieve stable production of IC chips, specifically thin chips.

IC chip pickup technology

As memory chips have become progressively thinner, a possibility for damaging chips arises when they are picked up from the wafers, attributing to an increase of a fraction defective and productivity deterioration. Shibaura unique chip bonder, which applies a chip pickup method suitable for thin chips, can reduce the damage to the chips even thin chips.

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?Achieve both IC chip mounting accuracy and productivity.

High-precision IC chip mounting technology

With the requirement for high integration for semiconductor devices as the background, the chiplet technology is attracting much attention for back end process. There is a need for SiP (System in Package) that realizes the optimum combination of heterogeneous chips in an optimum manner. To combine chips at high integration, a chip bonder that performs stable chip mounting at high accuracy is important. In general, the chip bonder that operates at a high speed is impacted by thermal expansion caused by a temperature change of each section, making it difficult to maintain a stable high repeat accuracy. This problem is exacerbated in the FO-PLP process as it uses large substrates. Our chip bonder is equipped with a function that automatically detects and corrects postural deformations at process points during production operation. This enables both a stable chip bonding accuracy and a high production capacity.

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